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| To: | Will Watts (Editor: EUG #0 - EUG #13) |
| From: | Derek Hilton <address hidden> |
| Subject: | AND ELK SHALL SPEAK UNTO PC...WITH ANY LUCK! |
| Mail Ref.: | EUG #08 |
I was at first worried about timing, since the WD1770 data rata is very close to the time (by cycle count at the 1 Mhz RAM clock rate) for the tightest test/read loop, but was then confused by the MSDOS sector layout. Acorn ADFS "L" formal fills side 1, tracks 0-79 then side 2 track 0. To save head movement however, MSDOS follows side 1, sector 9 with side 2 sector 1 of the same track (or "Cylinder").
If anyone is interested, apart from WD1770 itself at:
&FCC4 Command reg (Write) or Flags (Read) &FCC5 Track reg &FCC6 Sector reg &FCC7 Data regThere is a latch of some kind in the Plus 3 at &FCC0, of which at least 4 bits switch one or more outputs when added to &20 and stored in FCC0.
Bit/Val Selects
0 &01 Drive 0
1 &02 Drive 1
2 &04 Side 2
3 &08 Single-density
&00 Double-density
(connects to WD1770's active low DDEN or Double DENsity input)
4 &10 No function yet found
5 &20 When bit 5 is set on write, bits 0-3 clear their latches.
Storing &00 in &FCC0 apparently clears all latches.
Derek Hilton
As a professional idiot, I didn't understand a word of that. Any comments from people who did?